general description the max3786 is an ac-coupled, serial-ata (sata)- compatible, 1.5gbps multiplexer/buffer (mux/buffer) ic that provides the capability to switch a single serial data signal between two redundant i/o channels. sata out-of-band (oob) signaling is supported using loss-of-signal (los) detect on all three inputs and shutdown on the corresponding outputs. the high-speed inputs and outputs are all internally terminated, compati- ble with 100 ? differential systems, and must be ac-cou- pled to the controller ic and sata-compatible disk drive. receive equalization (eq) and transmit preemphasis (pe) are provided on the dual i/o channels to mitigate the effects of intersymbol interference in the signal path. loopback can be enabled on the nonselected i/o channel. the max3786 operates from a single +3.3v supply and typically consumes 520mw with pe and eq enabled. it is available in a 5mm x 5mm, 32-lead thin qfn exposed-pad package and operates over a 0 c to +85? temperature range. applications 1.5gbps serial ata redundancy features ? < 50ps p-p total residual jitter (20in fr-4, eq and pe on) ? supports sata oob signaling ? loopback of nonselected channel ? receive equalization and transmit preemphasis on controller-side i/o channels ? 0? to +85? operation ? 32-pin, 5mm ? 5mm thin qfn package ? +3.3v power supply max3786 1.5gbps serial ata-compatible mux/buffer with loopback and equalization ________________________________________________________________ maxim integrated products 1 ordering information max3786 out1 controller 1 controller 2 disk drive 2in to 24in fr-4 2in to 24in fr-4 in1 rx tx in0 out0 sata connector sata connector connector connector connector connector t ypical application circuit 19-2727; rev 2; 6/04 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available part temp range pin-package pkg code max3786utj 0? to +85? 32 thin qfn-ep* (5mm 5mm) t3255-2 max3786utj + 0?c to +85?c 32 thin qfn-ep* (5mm 5mm) pin configuration and functional diagram appear at end of data sheet. + denotes lead-free package. * ep = exposed pad.
max3786 1.5gbps serial ata-compatible mux/buffer with loopback and equalization 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. supply voltage, v cc ......................................-0.5v to +5.0v continuous current at outputs (tx? out1? out0?............................?2ma input voltage (rx? in1? in0? ..................................-0.5v to (v cc + 0.5v) differential input voltage (rx? in1? in0? .....................................?.0v voltage at pe1en , pe0en , eq1en , eq0en , lb_en , sel, cm1, cm0 .........................-0.5v to (v cc + 0.5v) continuous power dissipation (t a = +85?) 32-pin thin qfn (derate 21.3mw/? above +85?) .1384mw operating temperature range ....................?? to +85? storage temperature range .......................?.-55? to +150? lead temperature (soldering, 10s) .............?.+300? electrical characteristics (v cc = +3.0v to +3.6v, t a = 0? to +85?. typical values at v cc = +3.3v, t a = +25?, unless otherwise noted.) parameter symbol conditions min typ max units eq and pe off 125 150 supply current i cc eq and pe on 158 220 ma maximum data rate (note 1) 1.5 gbps differential input voltage (rx, in1, in0) (note 2) 250 600 mv p-p input termination differential 85 100 115 ? input return loss |s11| 100mhz to 2.5ghz 14 db input equalization at 750mhz 4.5 db pe off 400 500 600 differential output voltage (tx, out0, out1) (note 2) output disabled by oob signaling 30 mv p-p output termination single ended to v cc 42.5 50 57.5 ? output transition time 1.5gbps data, 20% to 80% (notes 1, 3) 135 200 270 ps output preemphasis at 750mhz (note 4) 4.5 db output jitter dj + 14rj, eq and pe off (notes 1, 5, 8) 30 40 ps p-p total residual jitter dj + 14rj, eq and pe on (notes 1, 6, 8) 40 50 ps p-p differential output skew (note 1) 20 ps los detector threshold 50 150 mv p-p output startup/shutdown time (note 7) 5 ns lvcmos input high voltage v ih 1.5 v
max3786 1.5gbps serial ata-compatible mux/buffer with loopback and equalization _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = +3.0v to +3.6v, t a = 0? to +85?. typical values at v cc = +3.3v, t a = +25?, unless otherwise noted.) parameter symbol conditions min typ max units lvcmos input low voltage v il 0.5 v lvcmos input high current i oh v ih = +2.0v to (v cc + 0.3v) 150 ? lvcmos input low current i ol v il = -0.3v to +0.8v 150 ? note 1: ac specifications are guaranteed by design and characterization. note 2: differential voltage is defined as v p-p = (v+ - v-). inputs and outputs must be ac-coupled for proper operation. note 3: output transition time measured using a 0000011111 pattern, with transmit pe off. note 4: transmit pe compensates for 20in of 6-mil-wide differential stripline in fr-4 or equivalent path loss. note 5: jitter after paths from rx to out_ or in_ to tx. measured with no jitter on the input, using a ?28.5 pattern, and a path con- sisting of the max3786 alone. note 6: jitter after eq for the paths from rx to out_ or in_ to tx. measured with no jitter on the input, using a ?28.5 pattern, and a path consisting of the max3786 plus 20in of 6-mil-wide differential stripline in fr-4 on the output. note 7: total time for los to enable/disable the outputs. note 8: measured with a 100mv sinusoidal common-mode signal in the 2mhz f 200mhz range. t ypical operating characteristics (v cc = 3.3v, t a = +25?, unless otherwise noted.) supply current vs. temperature max3786 toc01 temperature ( c) current (ma) 80 70 50 60 20 30 40 10 60 80 100 120 140 160 180 200 220 240 260 280 40 0 pe and eq on pe and eq off -40 -35 -30 -25 -20 -15 -10 -5 0 0 0.5 1.0 1.5 2.0 2.5 differential input return loss max3786 toc02 frequency (ghz) |s11| (db) total residual jitter vs. path length (fr-4 stripline at out0, k28.5 pattern) max3786 toc03 fr-4 length (in) total residual jitter (ps p-p ) 25 20 5 10 15 10 20 30 40 50 60 70 80 0 030
max3786 1.5gbps serial ata-compatible mux/buffer with loopback and equalization 4 _______________________________________________________________________________________ 0 200 100 400 300 500 600 0 200 300 100 400 500 600 output swing vs. input swing ( k28.5 pattern) max3786 toc04 input swing (mv p-p ) output swing (mv p-p ) output eye diagram, transmit pe on (10in fr-4 stripline at out0, k28.5 pattern) 70mv/div max3786 toc06 100ps/div output eye diagram, receive eq on (10in fr-4 stripline at in0, k28.5 pattern) 70mv/div max3786 toc05 100ps/div output eye diagram, transmit pe on (20in fr-4 stripline at out0, k28.5 pattern) 70mv/div max3786 toc08 100ps/div output eye diagram, receive eq on (20in fr-4 stripline at in0, k28.5 pattern) 70mv/div max3786 toc07 100ps/div t ypical operating characteristics (continued) (v cc = 3.3v, t a = +25?, unless otherwise noted.)
detailed description the max3786 consists of three multiplexers, i/o buffers, and los-detection circuitry (see the functional diagram ). the buffers on the controller side provide eq on the inputs and pe on the outputs. mux/buffer logic by means of the lvcmos input sel, a sata-compati- ble device at tx/rx can be connected to either in0/out0 or in1/out1. when sel is low, tx/rx are connected to in0/out0, and when sel is high, tx/rx are connected to in1/out1. use of the sel input pro- vides the ability to operate a single sata disk drive from redundant controllers. loopback is provided on the in_/out_ side and is controlled by the lvcmos input lb_en . when lb_en is low, the nonselected in_/out_ loops back (see table 1). the sel and lb_en control lines are internally pulled high through 40k ? r esi st or s ( see the functional diagram ). loss-of-signal logic at each high-speed input to the max3786, an los cir- cuit is provided. in this circuit, a differential signal of 50mv p-p or less is detected as off, and a signal of greater than 150mv p-p is detected as on. the los detectors, in combination with the select logic, control their associated high-speed output-disable circuits, so max3786 1.5gbps serial ata-compatible mux/buffer with loopback and equalization _______________________________________________________________________________________ 5 pin description pin name function 1, 4, 8, 15, 17, 20, 21, 24, 26, 30 v cc +3.3v supply voltage 2 tx+ positive tx data output, cml. serial ata compatible. 3 tx- negative tx data output, cml. serial ata compatible. 5 sel multiplex select control input, lvcmos. set high to connect rx/tx to out1/in1. 6 rx- negative rx data input, cml. serial ata compatible. 7 rx+ positive rx data input, cml. serial ata compatible. 9 pe1en channel 1 preemphasis enable input, lvcmos. set low to enable out1 pe. 10 eq1en channel 1 equalization enable input, lvcmos. set low to enable in1 eq. 11 lb_en loopback enable input, lvcmos. set low to loopback data on nonselected channel. 12 cm1 input 1 common-mode point. normally not connected; can be connected to v cc through 1.0? capacitor. see figure 1. 13 in1- negative channel 1 data input, cml. serial ata compatible. 14 in1+ positive channel 1 data input, cml. serial ata compatible. 16, 25 gnd supply ground 18 out1- negative channel 1 data output, cml. serial ata compatible. 19 out1+ positive channel 1 data output, cml. serial ata compatible. 22 out0- negative channel 0 data output, cml. serial ata compatible. 23 out0+ positive channel 0 data output, cml. serial ata compatible. 27 in0- negative channel 0 data input, cml. serial ata compatible. 28 in0+ positive channel 0 data input, cml. serial ata compatible. 29 cm0 input 0 common-mode point. normally not connected; can be connected to v cc through 1.0? capacitor. see figure 1. 31 eq0en channel 0 equalization enable input, lvcmos. set low to enable in0 eq. 32 pe0en channel 0 preemphasis enable input, lvcmos. set low to enable out0 pe. ep exposed pad ground. the exposed pad must be soldered to the circuit board ground for proper thermal and electrical performance.
max3786 that oob signaling is transmitted through the max3786 (see table 1). the time for the los circuit to detect an inactive input and disable the associated output, or detect an active input and enable the output, is less than 5ns. equalization and preemphasis high-speed inputs in0 and in1 have integrated equal- ization, and high-speed outputs out0 and out1 have integrated pe to mitigate the effects of intersymbol interference in an fr-4 transmission line signal path. these circuits provide eq or pe that matches the typi- cal path loss of a 20in, 6-mil fr-4 differential stripline. four active-low lvcmos inputs, eq0en , eq1en , pe0en , and pe1en are provided to enable eq and pe independently. all four control lines are internally pulled high through 40k ? resistors (see the functional diagram ). eq and pe should be enabled when the total path loss exceeds approximately 2.5db. input terminations all high-speed inputs accept current-mode logic (cml) and are sata compatible. the inputs contain internal 100 ? differential termination, and must be ac-coupled to the controller ic and sata-compatible disk drive for proper operation. two pins (cm0 and cm1) provide access to the in0 and in1 common-mode points. cm0 and cm1 are nor- mally left unconnected; however, a capacitor up to 1.0? can be connected from each cm_ pin to v cc , providing a low-impedance ac common-mode path to v cc (see figure 1). output terminations the max3786 uses cml for its high-speed outputs. they are sata compatible and provide 50 ? termina- tions to v cc (see figure 2). the high-speed outputs must be ac-coupled to the controller ic and sata- compatible disk drive for proper operation. applications information hot swap the max3786 is designed so that arbitrary sequencing of v cc and i/o signals during startup does not affect operation of the part. exposed-pad package the max3786 is available in a 5mm ? 5mm, 32-pin thin qfn package with ep for signal integrity and place- ment flexibility. the exposed pad provides thermal and electrical connectivity to the ic, and must be soldered to a high-frequency ground plane. it is recommended to use at least nine vias to connect the ground pad underneath the 32-lead thin qfn package to the pc board ground plane. layout considerations use controlled-impedance transmission lines to inter- face with the max3786 high-speed inputs and outputs. power-supply decoupling capacitors should be placed as close as possible to the v cc pins. 1.5gbps serial ata-compatible mux/buffer with loopback and equalization 6 _______________________________________________________________________________________ max3786 v cc v cc v cc in_+ cm_ in_- 50 ? 50 ? 2pf 0.2ma 1.6k ? figure 1. input structure (in0, in1) 50 ? 50 ? v cc out_+ out_- max3786 figure 2. output structure (out0, out1)
max3786 1.5gbps serial ata-compatible mux/buffer with loopback and equalization _______________________________________________________________________________________ 7 input controls loss-of-signal detect output function sel lb_en los_rx los_0 los_1 tx out0 out1 low low false false false in0 rx in1 low low false false true in0 rx off low low false true false off rx in1 low low false true true off rx off low low true false false in0 off in1 low low true false true in0 off off low low true true false off off in1 low low true true true off off off low high false false x in0 rx off low high false true x off rx off low high true false x in0 off off low high true true x off off off high low false false false in1 in0 rx high low false false true off in0 rx high low false true false in1 off rx high low false true true off off rx high low true false false in1 in0 off high low true false true off in0 off high low true true false in1 off off high low true true true off off off high high false x false in1 off rx high high false x true off off rx high high true x false in1 off off high high true x true off off off table 1. operation truth table sel = low connects tx/rx to in0/out0, high connects tx/rx to in1/out1. los = true indicates loss of signal. lb_en = low enables loopback of nonselected channel. x = don? care.
max3786 1.5gbps serial ata-compatible mux/buffer with loopback and equalization 8 _______________________________________________________________________________________ cml los_0 (and) sel (or) los_1 (and) sel in0 in1 out0 out1 2 2 2 2 2 2 0 1 tx rx sel pe eq eq eq0en vcc 40k ? cml los_rx los_1 (los_rx (and) sel) (or) (lb_en (and) sel) (or) (los_0 (and) sel (and) lb_en) (los_rx (and) sel) (or) (lb_en (and) sel) (or) (los_1 (and) sel (and) lb_en) los_0 eq1en pe0en pe0en pe1en 0 1 pe 0 1 vcc 40k ? pe1en vcc 40k ? eq0en vcc 40k ? eq1en vcc 40k ? lb_en vcc 40k ? max3786 functional diagram 32 31 30 29 28 27 26 pe0en eq0en v cc cmo in0+ in0- v cc 25 gnd 9 10 11 12 13 14 15 pe1en eq1en lb_en v cc cm1 in1- in1+ v cc 16 gnd 17 18 19 20 21 22 23 v cc *the exposed pad of the qfn package must be soldered to ground for proper thermal and electrical operation. out1- out1+ v cc v cc out0- out0+ 8 7 6 5 4 3 2 v cc rx+ rx- sel v cc tx- tx+ max3786 qfn* 1 24 v cc top view pin configuration chip information transistor count: 2848 process: sige bicmos
max3786 1.5gbps serial ata-compatible mux/buffer with loopback and equalization _______________________________________________________________________________________ 9 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) qfn thin.eps d2 (nd-1) x e e d c pin # 1 i.d. (ne-1) x e e/2 e 0.08 c 0.10 c a a1 a3 detail a e2/2 e2 0.10 m c a b pin # 1 i.d. b 0.35x45 d/2 d2/2 l c l c e e l c c l k l l detail b l l1 e xxxxx marking g 1 2 21-0140 package outline, 16, 20, 28, 32l thin qfn, 5x5x0.8mm -drawing not to scale- l
max3786 1.5gbps serial ata-compatible mux/buffer with loopback and equalization maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 10 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. common dimensions 3.35 3.15 t2855-1 3.25 3.35 3.15 3.25 max. 3.20 exposed pad variations 3.00 t2055-2 3.10 d2 nom. min. 3.20 3.00 3.10 min. e2 nom. max. ne nd pkg. codes 1. dimensioning & tolerancing conform to asme y14.5m-1994. 2. all dimensions are in millimeters. angles are in degrees. 3. n is the total number of terminals. 4. the terminal #1 identifier and terminal numbering convention shall conform to jesd 95-1 spp-012. details of terminal #1 identifier are optional, but must be located within the zone indicated. the terminal #1 identifier may be either a mold or marked feature. 5. dimension b applies to metallized terminal and is measured between 0.25 mm and 0.30 mm from terminal tip. 6. nd and ne refer to the number of terminals on each d and e side respectively. 7. depopulation is possible in a symmetrical fashion. 8. coplanarity applies to the exposed heat sink slug as well as the terminals. 9. drawing conforms to jedec mo220, except exposed pad dimension for t2855-1, t2855-3 and t2855-6. notes: symbol pkg. n l1 e e d b a3 a a1 k 10. warpage shall not exceed 0.10 mm. jedec t1655-1 3.20 3.00 3.10 3.00 3.10 3.20 0.70 0.80 0.75 4.90 4.90 0.25 0.25 0 -- 4 whhb 4 16 0.35 0.30 5.10 5.10 5.00 0.80 bsc. 5.00 0.05 0.20 ref. 0.02 mi n. max. nom. 16l 5x5 3.10 t3255-2 3.00 3.20 3.00 3.10 3.20 2.70 t2855-2 2.60 2.60 2.80 2.70 2.80 l 0.30 0.50 0.40 -- - -- - whhc 20 5 5 5.00 5.00 0.30 0.55 0.65 bsc. 0.45 0.25 4.90 4.90 0.25 0.65 - - 5.10 5.10 0.35 20l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. -- - whhd-1 28 7 7 5.00 5.00 0.25 0.55 0.50 bsc. 0.45 0.25 4.90 4.90 0.20 0.65 - - 5.10 5.10 0.30 28l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. -- - whhd-2 32 8 8 5.00 5.00 0.40 0.50 bsc. 0.30 0.25 4.90 4.90 0.50 - - 5.10 5.10 32l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. 0.20 0.25 0.30 down bonds allowed no yes 3.10 3.00 3.20 3.10 3.00 3.20 t2055-3 3.10 3.00 3.20 3.10 3.00 3.20 t2055-4 t2855-3 3.15 3.25 3.35 3.15 3.25 3.35 t2855-6 3.15 3.25 3.35 3.15 3.25 3.35 t2855-4 2.60 2.70 2.80 2.60 2.70 2.80 t2855-5 2.60 2.70 2.80 2.60 2.70 2.80 t2855-7 2.60 2.70 2.80 2.60 2.70 2.80 3.20 3.00 3.10 t3255-3 3.20 3.00 3.10 3.20 3.00 3.10 t3255-4 3.20 3.00 3.10 no no no no no no no no yes yes yes yes 3.20 3.00 t1655-2 3.10 3.00 3.10 3.20 yes no 3.20 3.10 3.00 3.10 t1655n-1 3.00 3.20 3.35 3.15 t2055-5 3.25 3.15 3.25 3.35 y 3.35 3.15 t2855n-1 3.25 3.15 3.25 3.35 n 3.35 3.15 t2855-8 3.25 3.15 3.25 3.35 y 3.20 3.10 t3255n-1 3.00 no 3.20 3.10 3.00 l 0.40 0.40 ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** see common dimensions table 0.15 11. marking is for package orientation reference only. g 2 2 21-0140 package outline, 16, 20, 28, 32l thin qfn, 5x5x0.8mm -drawing not to scale- 12. number of leads shown are for reference only. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
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